The present disclosure relates to a method for producing a semiconductor circuit arrangement, and in particular to a method for producing a BICMOS circuit arrangement having a reduced number of lithography planes.
Integrated radiofrequency circuits are usually realized in so-called BiCMOS technologies. This requires bipolar transistors in the circuit sections which make stringent demands in respect of low noise and radio-frequency suitability. Although in modern CMOS technologies the field effect transistors or the limiting frequencies thereof are almost sufficient to replace the bipolar transistor, the noise performance, in particular, remains inadequate. Although pure CMOS circuits are accordingly gaining more and more acceptance over BiCMOS circuits in particular with regard to their wafer costs, the performance features or the performance of BiCMOS circuits cannot yet be achieved, however.
However, conventional BiCMOS technologies require a multiplicity of lithography planes and thus of very cost-intensive lithography masks and also additional process steps in order to integrate the bipolar transistor into the CMOS process.